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Philips Semiconductors Advanced BiCMOS Products
Product specification
Dual octal latched transceivers with dual enable (3-State)
MB2543
FEATURES
latch
* Two 8-bit octal transceivers with D-type * Live insertation/extraction permitted * Power-up 3-State * Power-up reset * Multiple VCC and GND pins minimize
switching noise
* Output capability: +64mA/-32mA * Latch-up protection exceeds 500mA per
Jedec JC40.2 Std 17
power dissipation with high speed and high output drive. The MB2543 dual octal registered transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable (nLEAB, nLEBA) and Output Enable (nOEAB, nOEBA) inputs are provided for each register to permit independent control of data transfer in either direction. The outputs are guaranteed to sink 64mA.
* ESD protection exceeds 2000V per MIL
STD 883 Method 3015 and 200V per Machine Model
* Back-to-back registers for storage * Separate controls for data flow in each
direction
DESCRIPTION
The MB2543 high-performance BiCMOS device combines low static and dynamic
QUICK REFERENCE DATA
SYMBOL tPLH tPHL CIN CI/O ICCZ PARAMETER Propagation delay nAx to nBx Input capacitance I/O capacitance Total supply current CONDITIONS Tamb = 25C; GND = 0V CL = 50pF; VCC = 5V VI = 0V or VCC VO = 0V or VCC; 3-State Outputs disabled; VCC = 5.5V TYPICAL 3.3 4 7 120 UNIT ns pF pF A
ORDERING INFORMATION
PACKAGES 52-pin plastic Quad Flat Pack TEMPERATURE RANGE -40C to +85C ORDER CODE MB2543BB DRAWING NUMBER 1418B
PIN CONFIGURATION
LOGIC SYMBOL
50 1OEAB 1OEBA 51 1 2 3 5 6 7
1LEAB
1LEBA
1EAB
1EBA
GND
1A1
1A0
1B0
1B1
Vcc
Vcc
1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7 49 39 1B2 38 1B3 37 1B4 36 1B5 35 1B6 44 48 45 1EAB 1EBA 1LEAB 1LEBA 1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7 1OEAB 1OEBA 47 46
52 51 1A2 1A3 1A4 GND 1A5 1A6 1A7 2A0 2A1 1 2 3 4 5 6 7 8 9
50 49 48 47
46 45 44 43 42
41 40
MB2543 52-pin PQFP
34 1B7 33 2B0 32 2B1 31 2B2 30 GND 29 2B3 28 2B4 27 2B5 18 23 19 22
42
41
39
38
37
36
35
34
8
9
10
11
12
13
15
16
2A2 10 2A3 11 2A4 12 2A5 13 14 15 16 Vcc 2A6 2A7 17 18 19 20 GND 2OEAB 2EAB 2LEAB 21 22 23 24 25 2B7 2OEBA 2LEBA 2EBA 2B6 26 Vcc
2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7 2EAB 2EBA 2LEAB 2LEBA 2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7 2OEAB 2OEBA 20 21
33
32
31
29
28
27
25
24
August 23, 1993
1
853-1656 10584
Philips Semiconductors Advanced BiCMOS Products
Product specification
Dual octal latched transceivers with dual enable (3-State)
MB2543
LOGIC DIAGRAM
DETAIL A D LE Q nB0
nA0
Q
D LE
nA1 nA2 nA3 nA4 nA5 nA6 nA7 DETAIL A X 7
nB1 nB2 nB3 nB4 nB5 nB6 nB7
nOEBA nOEAB nEBA nEAB
nLEBA
nLEAB
LOGIC SYMBOL (IEEE/IEC)
47 49 48 46 44 45 & & & & EN2(BA) EN1(AB) 20 18 19 21 23 22 & & & & EN2(BA) EN1(AB)
50 51 1 2 3 5 6 7
1
2
42 41 39 38 37 36 35 34
8 9 10 11 12 13 15 16
1
2
33 32 31 29 28 27 25 24
August 23, 1993
2
Philips Semiconductors Advanced BiCMOS Products
Product specification
Dual octal latched transceivers with dual enable (3-State)
MB2543
FUNCTIONAL DESCRIPTION
The MB2543 contains two sets of eight D-type latches, with separate control pins for each set. Using data flow from A to B as an example, when the A-to-B Enable (nEAB) input and the A-to-B Latch Enable (nLEAB) input are Low the A-to-B path is transparent.
A subsequent Low-to-High transition of the nLEAB signal puts the A data into the latches where it is stored and the B outputs no longer change with the A inputs. With EAB and nOEAB both Low, the 3-State B output
buffers are active and display the data present at the outputs of the A latches. Control of data flow from B to A is similar, but using the nEBA, nLEBA, and nOEBA inputs.
PIN DESCRIPTION
PIN NUMBER 50, 51, 1, 2, 3, 5, 6, 7, 8, 9, 10, 11, 12, 13, 15, 16 42, 41, 39, 38, 37, 36, 35, 34, 33, 32, 31, 29, 28, 27, 25, 24 47, 46, 20, 21 49, 44, 18, 23 48, 45, 19, 22 4, 17, 30, 43 14, 26, 40, 52 SYMBOL 1A0 - 1A7, 2A0 - 2A7 1B0 - 1B7, 2B0 - 2B7 1OEAB, 1OEBA, 2OEAB, 2OEBA 1EAB, 1EBA, 2EAB, 2EBA 1LEAB, 1LEBA, 2LEAB, 2LEBA GND VCC NAME AND FUNCTION Data inputs/outputs Data inputs/outputs A to B / B to A Output Enable inputs (active-Low) A to B / B to A Enable inputs (active-Low) A to B / B to A Latch Enable inputs (active-Low) Ground (0V) Positive supply voltage
FUNCTION TABLE
INPUTS nOEXX H X L L L L L L L H= h= L= l= X= = NC= Z= nEXX X H L L L L L nLEXX X X L L L L H nAx or nBx X X h l h l H L X OUTPUTS nBx or nAx Z Z Z Z H L H L NC Disabled Disabled Disabled + Latch Latch + Display Transparent Hold STATUS
High voltage level High voltage level one set-up time prior to the Low-to-High transition of nLEXX or nEXX (XX = AB or BA) Low voltage level Low voltage level one set-up time prior to the Low-to-High transition of nLEXX or nEXX (XX = AB or BA) Don't care Low-to-High transition of nLEXX or nEXX (XX = AB or BA) No change High impedance or "off" state
August 23, 1993
3
Philips Semiconductors Advanced BiCMOS Products
Product specification
Dual octal latched transceivers with dual enable (3-State)
MB2543
ABSOLUTE MAXIMUM RATINGS1 , 2
SYMBOL VCC IIK VI IOK VOUT IOUT Tstg PARAMETER DC supply voltage DC input diode current DC input voltage3 VO < 0 output in Off or High state output in Low state VI < 0 CONDITIONS RATING -0.5 to +7.0 -18 -1.2 to +7.0 -50 -0.5 to +5.5 128 -65 to 150 UNIT V mA V mA V mA C
DC output diode current DC output voltage3
DC output current Storage temperature range
NOTES: 1 . Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2 . The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150C. 3 . The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER Min VCC VI VIH VIL IOH IOL t/v Tamb DC supply voltage Input voltage High-level input voltage Low-level Input voltage High-level output current Low-level output current Input transition rise or fall rate Operating free-air temperature range 0 -40 4.5 0 2.0 0.8 -32 64 10 +85 LIMITS Max 5.5 VCC V V V V mA mA ns/V C UNIT
August 23, 1993
4
Philips Semiconductors Advanced BiCMOS Products
Product specification
Dual octal latched transceivers with dual enable (3-State)
MB2543
DC ELECTRICAL CHARACTERISTICS
LIMITS SYMBOL PARAMETER TEST CONDITIONS Tamb = +25C MIN VIK Input clamp voltage VCC = 4.5V; IIK = -18mA VCC = 4.5V; IOH = -3mA; VI = VIL or VIH VOH High-level output voltage VCC = 5.0V; IOH = -3mA; VI = VIL or VIH VCC = 4.5V; IOH = -32mA; VI = VIL or VIH VOL VRST II Low-level output voltage Power-up output voltage3 Input leakage current IOFF IPU/PD IIH + IOZH IIL + IOZL ICEX IO ICCH ICCL ICCZ ICC Additional supply current per input pin2 Quiescent supply current Control pins Data pins VCC = 4.5V; IOL = 64mA; VI = VIL or VIH VCC = 5.5V; IO = 1mA; VI = GND or VCC VCC = 5.5V; VI = GND or 5.5V VCC = 5.5V; VI = GND or 5.5V VCC = 0.0V; VO or VI 4.5V VCC = 2.1V; VO = 0.5V; VI = GND or VCC; VOE = Don't care VCC = 5.5V; VO = 2.7V; VI = VIL or VIH VCC = 5.5V; VO = 0.5V; VI = VIL or VIH VCC = 5.5V; VO = 5.5V; VI = GND or VCC VCC = 5.5V; VO = 2.5V VCC = 5.5V; Outputs High, VI = GND or VCC VCC = 5.5V; Outputs Low, VI = GND or VCC VCC = 5.5V; Outputs 3-State; VI = GND or VCC VCC = 5.5V; one input at 3.4V, other inputs at VCC or GND -50 2.5 3.0 2.0 TYP -0.9 2.9 3.4 2.4 0.42 0.13 0.01 5 5.0 5.0 5.0 -5.0 5.0 -100 120 38 120 0.5 0.55 0.55 1.0 100 100 50 50 -50 50 -180 250 60 250 1.5 -50 MAX -1.2 2.5 3.0 2.0 0.55 0.55 1.0 100 100 50 50 -50 50 -180 250 60 250 1.5 Tamb = -40C to +85C MIN MAX -1.2 V V V V V V A A A A A A A mA A mA A mA UNIT
Power-off leakage current Power-up/down 3-State output current4 3-State output High current 3-State output Low current Output High leakage current Output current1
NOTES: 1 . Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2 . This is the increase in supply current for each input at 3.4V. 3 . For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power. 4 . This parameter is valid for any VCC between 0V and 2.1V, with a transition time of up to 10msec. From VCC = 2.1V to VCC = 5V 10% a transition time of up to 100sec is permitted.
August 23, 1993
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Philips Semiconductors Advanced BiCMOS Products
Product specification
Dual octal latched transceivers with dual enable (3-State)
MB2543
AC CHARACTERISTICS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500 LIMITS SYMBOL PARAMETER WAVEFORM MIN tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ tPLZ Propagation delay nAx to nBx, nBx to nAx Propagation delay LEBA to nAx, LEAB to nBx Output enable time OEBA to nAx, OEAB to nBx Output disable time OEBA to nAx, OEAB to nBx Output enable time EBA to nAx, EAB to nBx Output disable time EBA to nAx, EAB to nBx 2 1, 2 4 5 4 5 4 5 4 5 1.5 1.6 1.9 2.1 1.6 2.3 1.0 1.4 1.6 2.3 1.0 1.4 Tamb = +25oC VCC = +5.0V TYP 3.2 3.3 3.9 4.1 3.6 4.5 3.6 3.2 3.6 4.5 3.6 3.2 MAX 4.6 4.6 5.3 5.5 5.0 5.9 5.0 4.6 5.0 5.9 5.0 4.6 Tamb = -40 to +85oC VCC = +5.0V 0.5V MIN 1.5 1.6 1.9 2.1 1.6 2.3 1.0 1.4 1.6 2.3 1.0 1.4 MAX 5.2 5.2 6.1 6.2 5.8 6.6 5.7 5.2 5.8 6.6 5.7 5.2 ns ns ns ns ns ns UNIT
AC SETUP REQUIREMENTS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500 LIMITS SYMBOL PARAMETER WAVEFORM Tamb = VCC = +5.0V MIN ts(H) ts(L) th(H) th(L) ts(H) ts(L) th(H) th(L) tw(L) Setup time nAx to LEAB, nBx to LEBA Hold time nAx to LEAB, nBx to LEBA Setup time nAx to EAB, nBx to EBA Hold time nAx to EAB, nBx to EBA Latch enable pulse width, Low 3 3 3 3 3 1.0 0.5 1.0 0.5 1.0 0.5 1.0 0.5 4.0 +25oC TYP 0.4 -0.1 0.2 -0.3 0.2 -0.3 0.3 -0.2 3.1 Tamb = -40 to +85oC VCC = +5.0V 0.5V MIN 1.0 0.5 1.0 0.5 1.0 0.5 1.0 0.5 4.0 ns ns ns ns ns UNIT
August 23, 1993
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Philips Semiconductors Advanced BiCMOS Products
Product specification
Dual octal latched transceivers with dual enable (3-State)
MB2543
AC WAVEFORMS
VM = 1.5V, VIN = GND to 3.0V
VIN
VM tPHL
VM tPLH VM VM
VIN
VM tPLH
VM tPHL VM VM
VOUT
VOUT
Waveform 1. Propagation Delay For Inverting Output
nAx, nBx
VM
VM
ts(H)
nLEAB, nLEBA, nEAB, nEBA
VM
Waveform 3. Data Setup and Hold Times and Latch Enable Pulse Width
nOEAB, nOEBA, nEAB, nEBA nOEAB, nOEBA, nEAB, nEBA
VM tPZH
VM tPHZ VOH -0.3V 0V
nAx, nBx
VM
Waveform 4. 3-State Output Enable Time to High Level and Output Disable Time from High Level
NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance.
August 23, 1993
EEEEEEEEE E EEEEEEEEE E EEEEEEEEE E EEEEEEEEE E
VM VM th(H) ts(L) th(L) tw(L) VM VM tPZL nAx, nBx
EEE EEE EEE EEE
Waveform 2. Propagation Delay For Non-Inverting Output
VM tPLZ
VM
VOL +0.3V 0V
Waveform 5. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level
7
Philips Semiconductors Advanced BiCMOS Products
Product specification
Dual octal latched transceivers with dual enable (3-State)
MB2543
TEST CIRCUIT AND WAVEFORMS
VCC 7.0V VIN PULSE GENERATOR RT D.U.T CL RL VOUT RL
90% NEGATIVE PULSE VM 10% tTHL (tF) tTLH (tR) 90%
tW VM 10%
90%
AMP (V)
0V tTLH (tR) tTHL (tF) 90% VM 10% tW 0V AMP (V)
Test Circuit for 3-State Outputs
POSITIVE PULSE 10%
VM
SWITCH POSITION
TEST tPLZ tPZL All other SWITCH closed closed open
VM = 1.5V Input Pulse Definition
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators.
INPUT PULSE REQUIREMENTS FAMILY Amplitude MB 3.0V Rep. Rate 1MHz tW 500ns tR 2.5ns tF 2.5ns
August 23, 1993
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Philips Semiconductors Advanced BiCMOS Products
Product specification
Dual octal latched transceivers with dual enable (3-State)
MB2543
7 6 5 4 ns 3 2 1 0 -55 -35
tPLH vs Temperature (Tamb) CL = 50pF, 1 Output Switching nAx to nBx or nBx to nAx
6 5 MAX Offset in ns 4 3 2 1 0 -1 -2
Adjustment of tPLH for Load Capacitance and # of Outputs Switching nAx to nBx or nBx to nAx
16 switching 8 switching 1 switching
4.5VCC 5.5VCC MIN
-15
5
25
45
65
85
105
125
0
50
100
150
200
C tPHL vs Temperature (Tamb) CL = 50pF, 1 Output Switching nAx to nBx or nBx to nAx
MAX
pF Adjustment of tPHL for Load Capacitance and # of Outputs Switching nAx to nBx or nBx to nAx
7 6 5
5 4 3 Offset in ns 4.5VCC 2 1 0 -1 -2
16 switching 8 switching 1 switching
4 ns 5.5VCC 3 2 1 0 -55 -35 -15 5 25 45 65 85 105 125 MIN
0
50
100
150
200
C tPLH vs Temperature (Tamb) CL = 50pF, 1 Output Switching nLEBA to nAx or nLEAB to nBx
MAX
pF Adjustment of tPLH for Load Capacitance and # of Outputs Switching nLEBA to nAx or nLEAB to nBx
6 5 4 16 switching 8 switching 1 switching 2 1 0 -1 -2
7 6 5 ns 4 3
4.5VCC 5.5VCC MIN
2 1 -55 -35 -15 5 25 45 65 85 105 125
Offset in ns
3
0
50
100
150
200
C
pF
August 23, 1993
9
Philips Semiconductors Advanced BiCMOS Products
Product specification
Dual octal latched transceivers with dual enable (3-State)
MB2543
8 7 6 5
tPHL vs Temperature (Tamb) CL = 50pF, 1 Output Switching nLEBA to nAx or nLEAB to nBx
5 4 MAX Offset in ns 3 2 1 0 MIN -1 -2
Adjustment of tPHL for Load Capacitance and # of Outputs Switching nLEBA to nAx or nLEAB to nBx
16 switching 8 switching 1 switching
4.5VCC 4 5.5VCC 3 2 1 -55 -35 -15 5 25 45 65 85 105 125
ns
0
50
100
150
200
C tPZH vs Temperature (Tamb) CL = 50pF, 1 Output Switching nOEBA to nAx or nOEAB to nBx
pF Adjustment of tPZH for Load Capacitance and # of Outputs Switching nOEBA to nAx or nOEAB to nBx
16 switching 8 switching 1 switching Offset in ns 4.5VCC 5.5VCC MIN -1 -2 2 1 0
7 6 5 ns 4 3 2 1 -55
5 4 MAX 3
-35
-15
5
25
45
65
85
105
125
0
50
100
150
200
C tPZL vs Temperature (Tamb) CL = 50pF, 1 Output Switching nOEBA to nAx or nOEAB to nBx
pF Adjustment of tPZL for Load Capacitance and # of Outputs Switching nOEBA to nAx or nOEAB to nBx
16 switching 8 switching 1 switching 2 1 0 -1 -2
8 7
5 4 MAX 3 4.5VCC 5.5VCC MIN Offset in ns
6 5 ns 4 3 2 1 -55 -35 -15 5 25 45 65 85 105 125
0
50
100
150
200
C
pF
August 23, 1993
10
Philips Semiconductors Advanced BiCMOS Products
Product specification
Dual octal latched transceivers with dual enable (3-State)
MB2543
7 6 5 4 ns 3 2 1 0 -55
tPHZ vs Temperature (Tamb) CL = 50pF, 1 Output Switching nOEBA to nAx or nOEAB to nBx
MAX
4.5VCC 5.5VCC
MIN
11 10 9 8 7 6 5 4 3 2 1 0 -1 -2 -3 -4
Adjustment of tPHZ for Load Capacitance and # of Outputs Switching nOEBA to nAx or nOEAB to nBx
16 switching 8 switching 1 switching
-35
-15
5
25
45
65
85
105
125
Offset in ns
0
50
100
150
200
C tPLZ vs Temperature (Tamb) CL = 50pF, 1 Output Switching nOEBA to nAx or nOEAB to nBx
pF Adjustment of tPLZ for Load Capacitance and # of Outputs Switching nOEBA to nAx or nOEAB to nBx
7 6 5 MAX 4 Offset in ns 3 2 1 0 -1 -2 16 switching 8 switching 1 switching
7 6 5 4 3 2 1 0 -55
4.5VCC 5.5VCC MIN
ns
-35
-15
5
25
45
65
85
105
125
0
50
100
150
200
C tPZH vs Temperature (Tamb) CL = 50pF, 1 Output Switching nEBA to nAx or nEAB to nBx
pF Adjustment of tPZH for Load Capacitance and # of Outputs Switching nEBA to nAx or nEAB to nBx
5 4 3 1 switching Offset in ns 4.5VCC 5.5VCC MIN 2 1 0 -1 -2
7 6 5 4 ns 3 2 1 0 -55 -35
MAX
16 switching 8 switching
-15
5
25
45
65
85
105
125
0
50
100
150
200
C
pF
August 23, 1993
11
Philips Semiconductors Advanced BiCMOS Products
Product specification
Dual octal latched transceivers with dual enable (3-State)
MB2543
8 7
tPZL vs Temperature (Tamb) CL = 50pF, 1 Output Switching nEBA to nAx or nEAB to nBx
5 4 MAX 3 Offset in ns 2 1 0 -1 -2
Adjustment of tPZL for Load Capacitance and # of Outputs Switching nEBA to nAx or nEAB to nBx
6 5 ns 4 3 2 1 -55 -35 -15 5 25 45 65 85 105 125
16 switching 8 switching 1 switching
4.5VCC 5.5VCC MIN
0
50
100
150
200
C tPHZ vs Temperature (Tamb) CL = 50pF, 1 Output Switching nEBA to nAx or nEAB to nBx
pF Adjustment of tPHZ for Load Capacitance and # of Outputs Switching nEBA to nAx or nEAB to nBx
16 switching 8 switching 1 switching
7 6 5 4 ns 3 2 1 0 -55 -35
12 10 MAX
8 Offset in ns 6 4 2 0 MIN -2 -4 -15 5 25 45 65 85 105 125 0 50 100 150
4.5VCC 5.5VCC
200
C tPLZ vs Temperature (Tamb) CL = 50pF, 1 Output Switching nEBA to nAx or nEAB to nBx
pF Adjustment of tPLZ for Load Capacitance and # of Outputs Switching nEBA to nAx or nEAB to nBx
16 switching 8 switching 1 switching
7 6 5 4 3 2 1 0 -55 -35
7 6 MAX Offset in ns 5 4 4.5VCC 5.5VCC MIN 0 -1 -2 3 2 1
ns
-15
5
25
45
65
85
105
125
0
50
100
150
200
C
pF
August 23, 1993
12
Philips Semiconductors Advanced BiCMOS Products
Product specification
Dual octal latched transceivers with dual enable (3-State)
MB2543
4
tTLH vs Temperature (Tamb) CL = 50pF, 1 Output Switching
11 9
Adjustment of tTLH for Load Capacitance/# of Outputs
16 switching 8 switching 1 switching
3 7 ns 2 4.5VCC 5.5VCC Offset in ns 5 3 1 -1 0 -55 -35 -15 5 25 45 65 85 105 125 -3 0 50 100 150
1
200
C tTHL vs Temperature (Tamb) CL = 50pF, 1 Output Switching
pF Adjustment of tTHL for Load Capacitance and # of Outputs Switching
6 5
4
3 Offset in ns
4 3 2 1 0 -1
16 switching 8 switching 1 switching
ns
2
4.5VCC 5.5VCC
1
0 -55 -35 -15 5 25 45 65 85 105 125
-2 0 50 100 150 200
C
pF
4.0 3.5 3.0 2.5 Volts 2.0 1.5 1.0 0.5 0 0
VOHV and VOLP vs Load Capacitance VCC = 5V, VIN = 0 to 3V
125C 25C -55C
6 5 4 3 Volts 2 1 0 125C 25C -55C -1 -2 -3
VOHP and VOLV vs Load Capacitance VCC = 5V, VIN = 0 to 3V
125C 25C -55C
125C 25C -55C
50
100
150
200
0
50
100
150
200
pF
pF
August 23, 1993
13

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